Modular electronic packaging system

Abstract

An electronic circuit packaging module includes a lower substrate, an upper cooling unit, and a frame disposed between the substrate and cooling unit. The substrate carries a plurality of integrated circuit chips with lead-outs to a plurality of downwardly protruding dimpled contact points disposed about the substrate periphery. The frame includes a plurality of insulative inserts about its periphery having conductive pins each with a lower extension extending below the insert and an upper contact point recessed within the insert. The cooling unit includes a plurality of fluid bags each in contact with a respective chip on the substrate for thermal management. A plurality of such modules are stacked in vertical registry with each downwardly protruding dimple of a module extending into a respective insert recess of an adjacent module. Electrical contact is thus effected between the respective dimples on the lower surface of the upper module and respective upper contact points of the recessed pins on the upper surface of the cover module. The lower extension of the pins of each insert of a given module thus extend into contact with the upper surface of a respective dimple of an adjacent lower module. In this manner, vertical electrical interconnection is established through the pins when mated in vertical registry, establishing a plurality of conductive paths in the Z axis.