The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 1991
Filed:
Dec. 16, 1988
Applicant:
Inventors:
Theodore W Houston, Richardson, TX (US);
Ping Yang, Richardson, TX (US);
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
357 51 ; 357 231 ; 357 236 ; 357 67 ; 357 71 ; 365154 ; 365156 ;
Abstract
A method for preventing single event upsets (SEUs) in MOS circuits is disclosed. A resistive area (88, 89) is situated in a semiconductor device such that when a high energy particle passes through the device and the resistive area (88, 89) the stray carriers caused by the particle will pass through the resistive area (88, 89) causing a voltage drop which will prevent the upset of the MOS circuit. A low resistance path is provided for the normal operating current in the device so that the normal operating parameters of the device are not affected by the protection provided by the resistive area (88, 89).