The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 1991

Filed:

Oct. 07, 1988
Applicant:
Inventors:

John S Yates, Jr, Nashua, NH (US);

Stephen J Ciavaglia, Nashua, NH (US);

John Manton, Marlboro, MA (US);

Michael Kahaiyan, East Bridgewater, MA (US);

Richard G Bahr, Cambridge, MA (US);

Barry J Flahive, Westford, MA (US);

Assignee:

Hewlett-Packard Company, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ; G06F / ; G06F / ;
U.S. Cl.
CPC ...
364200 ; 3642476 ; 364263 ; 3642629 ; 3642631 ; 3642624 ; 364260 ; 3642549 ; 3642599 ; 364259 ; 3649371 ; 3649378 ; 364947 ; 364948 ; 3649483 ; 36494834 ; 36494831 ; 3649462 ; 364956 ; 3649611 ; 3649613 ; 3649691 ; 364966 ;
Abstract

Apparatus and method for concurrent dispatch of instruction words which selectively comprise instruction components which are separately and substantially simultaneously received by distinct floating point and integer functional units. The instruction words are powers of 2 in length, (measured in terms of the smallest machine addressable unit) typically a 4 byte longword and an 8 byte quadword aligned to the natural boundaries also corresponding to powers of 2. To provide maximum operating efficiency, each functional (or processing) unit executes a component of an instruction word during an execution cycle. The type and length of the instruction word are indicated by one of the bit fields of the instruction word, which permits the apparatus to properly detect, store and transfer the instruction word to the appropriate functional unit. The invention combines the encoding efficiency of variable length instruction combined combined with the enhanced processing speed of simultaneous operation of all available functional units, to provide the execution efficiency of systems with a single instruction length.


Find Patent Forward Citations

Loading…