The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 1991
Filed:
May. 23, 1989
Michael R Monett, Santa Clara, CA (US);
Memory Technology, Boulder, CO (US);
Abstract
An apparatus for testing of multiple disks in a disk drive, and a method for testing utilizing the apparatus. Disks in a disk stack have associated read/write heads, and multiple read/write heads are controlled by read/write controllers. The controllers are controlled by chip select lines, and the read/write heads are selected via a head select bus. The disk stack is rotated by means of a motor or other rotation mechanism, and data is written onto tracks on surfaces of the disks by means of the read/write heads. A given head is selected by selecting its associated controller, and selecting the head code for that particular head. Multiple controllers may be selected at one time, with one head per controller engaged for the write function at a given time, such that several heads may be written at a time for speeding up the write proces in a disk testing procedure. In an alternative embodiment, several heads may be accessed per controller at one time. Test data is written onto each track on each surface of the disks by accessing all of the heads for each controller, and then the data is read out by accessing the read/write heads one at a time, and comparing the readout data with the written data for detecting faults on the surfaces of the disks. The method may be utilized with conventional head disk assemblies by disabling standard write unsafe lines, which normally prevent the enabling of more than one read/write controller at a time. The procedure is governed by a microprocessor, which controls each of the input, output and select lines.