The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 1991

Filed:

Sep. 01, 1989
Applicant:
Inventors:

Evert Seevinck, Eindhoven, NL;

Jan Dikken, Eindhoven, NL;

Hans-Jurgen O Schumacher, Eindhoven, NL;

Assignee:

U.S. Philips Corporation, New York, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307264 ; 307359 ; 307362 ; 307475 ;
Abstract

An integrated circuit which includes a converter for converting a logic input signal of a first logic type into a logic output signal of a second logic type, for example, from ECL to CMOS level. The converter comprises a buffer, including a controllable load and a driver transistor, and a control circuit. The load is controlled as a function of a control voltage and a reference voltage which are externally applied so that the output signal is substantially equal to the reference voltage if the input signal is substantially equal to the control voltage. In one embodiment the control circuit is a copy of the buffer and receives the control voltage at its input. Its load is controlled by a differential amplifier whose inputs receive the reference voltage and the output voltage of the control circuit. A CMOS-SRAM comprising ECL/CMOS level converters of the above kind communicates with fast ECL circuits and has a low energy consumption.


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