Thin film electroluminescent edge emitter structure on a silicon

Abstract

A thin film electroluminescent edge emitter assembly includes a substrate layer having a configuration to define at least one lateral edge surface and at least one integrated circuit formed therein. The integrated circuit has an input for receiving logic signals, and has an excitation voltage input and a plurality of output leads. The output leads form control electrodes each having an end portion terminating at the substrate lateral edge surface. The integrated circuit is operable to provide an excitation voltage to selected control electrodes in response to preselected logic signals provided to the integrated circuit at the logic signal input. A laminar arrangement formed from a first dielectric layer, a second dielectric layer, a phosphor layer interposed between the first and second dielectric layers and a common electrode layer is disposed on the end portions of the control electrodes. These various layers define a plurality of pixels each having a light-emitting face at the substrate lateral edge surface. Pixels associated with the selected control electrodes are responsive to the excitation voltage provided to the selected control electrodes to radiate a light signal emitted at the pixel light emitting faces.