The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 1991

Filed:

Sep. 26, 1989
Applicant:
Inventor:

Heinz Zitta, Drobollach, AT;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307355 ; 307462 ; 307494 ;
Abstract

A circuit configuration in complementary MOS technology includes a comparator having two input transistors forming an input differential stage, a current source supplying the input transistors, first and second load transistors being driven by the input transistors, and an output. An output driver circuit has at least one first output transistor being controlled the output of the comparator, and a second output transistor complementary to the at least one first output transistor. The input transistors have symmetrical geometries and the load transistors have asymmetrical geometries generating a given operating characteristic of the comparator. The output driver circuit is geometrically adapted to the given operating characteristic.


Find Patent Forward Citations

Zitta, Heinz. (1991). Cmos differential comparator with offset voltage (U.S. Patent No. 5043599). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5043599

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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