The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 20, 1991
Filed:
Dec. 04, 1989
Donald M Walters, Jr, Austin, TX (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A CMOS clock generator for generating internal CMOS phase clock signals having an adjustable overlap voltage includes a first circuit (18) having a first input responsive to an input clock signal for generating a first phase clock signal (01) on its output and a second circuit (22) having a first input responsive to the input clock signal for generating a second clock signal (02) on its output. The overlap voltage between the phase clock signals are adjustable either up or down to speed up or slow down a semiconductor chip after fabrication. This is achieved by the utilization of a laser to break or open up fuses connected to electrodes of transistor devices.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile