Amplitude compressing and/or expanding circuit employing enhanced

Abstract

In a circuit for expanding and/or compressing an amplitude of an input signal; a control signal is generated in response to the input signal and supplied to a multiplier circuit for multiplying the input signal by the control signal, a first subtracter subtracts the input signal from the output of the multiplier circuit, a signal processor processes the first subtracter output signal, and a second subtracter subtracts the output signal of the processor from the output signal of the multiplier circuit. The control signal generating circuit includes an envelope detector for detecting the envelope of the output signal of a proceeding absolute value generating circuit and which includes a pre-bit-shifting circuit for bit-shifting the envelope detected output signal by an amount determined by a pre-bit-shifting control signal, a normalizing circuit bit-shifting the output signal of the pre-bit shifting circuit so such that a normalized output signal is generated, the normalizing circuit further generating a bit shift signal representing a bit shift amount required for normalizing a pre-bit shifted signal corresponding to the detected envelope output signal occurring just prior to the current detected envelope output signal being applied to the pre-bit-shifting circuit, and a control circuit supplied with the bit shift signal for generating the control signal supplied to the pre-bit-shifting circuit.