Write pulse signal generating circuit for a semiconductor memory device

Abstract

A semiconductor integrated circuit device includes a pulse width expander circuit for expanding the pulse width of a pulse signal of the ECL (emitter coupled logic) level that has a very narrow pulse width, a level conversion circuit for converting the output signal of the ECL level of the pulse width expander circuit into a CMOS (complementary metal oxide semiconductor) level, and an internal circuit that is so connected as to receive the output signal of the level conversion circuit. In other words, the pulse signal having a narrow pulse width is expanded to have a pulse width which is sufficient for the level conversion circuit prior to performing the level conversion operation. Therefore, the level of the pulse signals having narrow pulse widths is stably converted.