Clock pulse generator capable of being switched to process both standard

Abstract

A clock pulse generator has a first clock pulse generator for generating a burst lock clock pulse signal synchronized with a color burst signal contained in a video signal; a second clock pulse generator for generating a line lock clock pulse signal synchronized with a horizontal synchronizing signal contained in the video signal; a detection circuit for detecting whether or not the video signal is a standard signal; and a phase control circuit for synchronizing the phase of the line lock clock pulse signal with the phase of the burst lock clock pulse signal when the detection circuit determines that the video signal is a standard signal. The line lock clock pulse signal is supplied to a synchronizing signal generator, a selected one of the burst lock clock pulse signal and the line lock clock pulse signal is supplied to a signal processing circuit when the detection circuit determines that the video signal is a standard signal, and the line lock clock pulse signal is supplied to the signal processing circuit when the detection circuit determines that the video signal is a non-standard signal.