The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 1991

Filed:

Feb. 21, 1989
Applicant:
Inventor:

Makoto Shikata, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
3072722 ; 307279 ; 307291 ; 307289 ;
Abstract

A flip-flop circuit comprises a first transfer gate receiving input data and being conductive responsive to a clock signal, a second transfer gate receiving an inverted input data and being conductive responsive to said clock signal, a third transfer gate receiving said input data and being conductive responsive to an inverted clock signal, and a fourth transfer gate receiving said inverted input data and being conductive responsive to said inverted clock signal. First and second inverters are cross-coupled across output nodes of said first and second transfer gates to serve as a latch circuit. Third and fourth inverters are cross-coupled across output nodes of said third and fourth transfer gates to serve as a latch circuit. A selector selects either the outputs of the first and second transfer gates, or the outputs of the third and fourth transfer gates, as output data and inverted output data of the flip-flop circuit, in accordance with said clock and inverted clock signals.


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