The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 1991

Filed:

Feb. 21, 1989
Applicant:
Inventors:

Chekib Akrout, Ris Orangis, FR;

Pierre Coppens, Savigny-Le-Temple, FR;

Bernard Denis, Mennecy, FR;

Pierre-Yves Urena, Vence, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ; G11C / ;
U.S. Cl.
CPC ...
365205 ; 365207 ; 365208 ; 36518901 ; 36518905 ; 307530 ;
Abstract

In combination with an electronic memory of the type having a plurality of memory cells (CA, . . . CN) connected between two bit lines (BLT, BLC) having inherent bit line capacitances (C1, C2), there is disclosed an improved sense amplifier (15) comprised of two stages. A first stage (16) includes a first clocked latch (5) having an enable device (T5), gated by a first control signal (SSA) and bit switches (T6, T7) connected between the common nodes (6, 7) of said first clocked latch and said bit lines, and gated by a bit switch control signal (BS) to provide an output signal on first data lines (DLT, DLC). A second stage (17) includes a second clocked latch (20) having an enable device (T24) gated by a second signal (SL) and data switches (T28, T29) connected between second data lines (DT, DC) at the same potential as data output nodes (21, 22) of said second clocked latch and said first data lines (DLT, DLC). Said data switches (T28, T29) are gated by a data switch control signal (DS) which is derived from the bit switch control signal (BS), so that the first and second stages (16, 17) operate sequentially to amplify the data continuously along the sensing chain of the data path during a READ operation to provide a data output signal on said data output nodes. The data is then available for further processing at the output terminal (24) of the output driver (23).


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