The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 1991

Filed:

Mar. 30, 1990
Applicant:
Inventor:

William F Gunning, Los Altos Hills, CA (US);

Assignee:

Xerox Corporation, Stamford, CT (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307475 ; 307443 ; 307451 ; 307362 ;
Abstract

This invention provides very wide channel, open drain, N-channel CMOS drivers and cascode CMOS receivers for interfacing VLSI CMOS circuits to transmission lines which are terminated by their characteristic resistive impedances to voltage levels on the order of about 1.2 v-2.0 v. These GTL (a coined descriptor) drivers and receivers typically operate with a voltage swing on the order of about 0.8 v-1.4 v on such transmission lines for carrying out binary communications between CMOS circuits configured to operate with standard 5 v rail-to-rail voltage swings for their internal signals.


Find Patent Forward Citations

Gunning, William. (1991). Drivers and receivers for interfacing vlsi cmos circuits to transmission (U.S. Patent No. 5023488). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5023488

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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