The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 1991

Filed:

Jan. 19, 1989
Applicant:
Inventors:

Etsushi Adachi, Amagasaki, JP;

Hiroshi Adachi, Amagasaki, JP;

Osamu Hayashi, Amagasaki, JP;

Kazuo Okahashi, Amagasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437228 ; 437231 ; 437235 ;
Abstract

A stress relaxation protective layer made of a silicone material is formed on a coating covering a circuit disposed on a substrate of a semiconductor device, and a predetermined depth of the surface of the stress relaxation protective layer is modified. A resist is formed on the thus-modified surface of the stress relaxation protective layer, and the thus-formed resist is patterned so that the resist in a predetermined region is removed. The stress relaxation protective layer in the region from which the above-described resist has been removed is removed by etching, and the remaining resist is removed. Next, the coating layer in the region from which the stress relaxation protective layer has been removed is removed by etching with the remaining stress relaxation protective layer used as a mask so that the circuit is exposed. The manufacturing process for semiconductor devices can be significantly simplified since the resist patterning needs to be performed only once and the resist removal can be performed by a dry treatment.


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