The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 1991

Filed:

May. 11, 1989
Applicant:
Inventor:

Stephen W Hobrecht, Los Altos, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
3072968 ; 307270 ; 323312 ;
Abstract

A DMOST driver circuit responds to the current flowing in the DMOST and the voltage appearing across it. The current and voltage are multiplied together in a g.sub.m amplifier which is coupled to drive a first input of a diff-amp. The diff-amp has its second input coupled to a source of reference potential. The diff-amp output is coupled to the DMOST gate to create a stabilizing negative feedback loop. The first diff-amp input is also coupled to a reference potential related threshold voltage so that the drive to the DMOST will be controlled by the DMOST power dissipation multiplied by a predetermined constant which is chosen to provide a safe dissipation level.


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Hobrecht, Stephen. (1991). Instantaneous power limiting circuit (U.S. Patent No. 5021682). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5021682

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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