The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 1991

Filed:

Jul. 21, 1989
Applicant:
Inventors:

Tohru Kimura, Sagamihara, JP;

Syuso Fujii, Kawasaki, JP;

Takashi Ohsawa, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
307475 ; 307443 ; 307451 ; 307481 ; 323315 ;
Abstract

A buffer circuit includes first and second differential amplification type buffer circuits. The input nodes of the first and second differential amplification type buffer circuits are connected together and the output nodes of the first and second differential amplification type buffer circuits are also connected to each other. The first differential amplification type buffer circuit is constituted by a pair of driving P-channel MOS transistors and N-channel MOS transistors acting as loads of the P-channel MOS transistors and connected to constitute a current mirror circuit. The second differential amplification type buffer circuit is constituted by P-channel MOS transistors acting as loads and connected to constitute a current mirror circuit and a pair of driving N-channel MOS transistors.


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