Data overlap decoder

Abstract

A decoding signal processing mechanism preserves the use of a single high data rate encoder at a transmitter site, so that the input data may be continuously encoded and transmitted, while using multiple low data rate decoders at the receiver site in such a manner that 'end effects' are avoided and the performance of high data rate decoding is attained. At the transmitter site, digital information signals are encoded at a first encoding rate and then transmitted over a communication channel to a receiver site. At the receiver site signals to be decoded are coupled to a respective one of a plurality of decoders which decode, at a second rate less than said first, encoding rate, respective overlapping blocks of received encoded digital information signals and derive respective portions of the digital information signals. The decoded outputs of the decoders are combined to recover the digital information signals. To accommodate overlapping blocks of encoded information signals each decoder includes a buffer delay (memory) for storing a respective sequential overlapping portion of the received encoded information signal. By controlling the storage of a respective portion of the encoded signals through its buffer delay, each decoder can effectively operate on a portion of the encoded signals that permits downstream reassembly of the original information signals without anomolies at the signal interface of successive decoded segments of the information signals.