The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 1991

Filed:

Jul. 27, 1988
Applicant:
Inventors:

Hidenobu Minagawa, Kawasaki, JP;

Yuuichi Tatsumi, Tokyo, JP;

Hiroshi Iwahashi, Yokohama, JP;

Masamichi Asano, Tokyo, JP;

Hiroto Nakai, Kawasaki, JP;

Mizuho Imai, Annaka, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ; G11C / ; G11C / ;
U.S. Cl.
CPC ...
365174 ; 365182 ; 365185 ; 365148 ;
Abstract

In a nonvolatile semiconductor memory device, a wiring layer is connected between a power source and a memory cell. Resistance of the wiring layer is larger than the on-resistance of a load transistor, so that the load transistor substantially determines the load characteristic. Therefore, the load characteristic curve is more gentle in inclination and more rectilinear in shape. This makes the data writing operation stable against a variance in the channel lengths of manufactured transistors forming the memory cells.


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