Data processing system with multi-access memory

Abstract

A memory system that includes several memory locations connected to a reading circuit that provides read access to the memory location. The memory system also includes the controller that receives control information. A writing circuit is further included that provides write access to either only a first portion of the memory locations, or simultaneously several portions of the memory locations is designated by the control information. This invention further includes a memory system that provides several memory locations for the storage of information together with the controller having a first port and a second port. The first port provides access to the memory locations in response to a first address range and the second port provides access to the memory locations in response to several address ranges wherein at least one of the address ranges of the second port is different then the address range of the first port. Still further, the invention includes a memory system having a first group of memory locations that store information in accordance with the first address range and a second group of memory locations. The two groups of memory locations are connected to a controller that provides write access to the first group of memory locations in a response to write commands having addresses within the first address range and, simultaneously writing each write command address in the second group of memory locations.