The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 02, 1991
Filed:
Oct. 30, 1989
Applicant:
Inventors:
Satoshi Maeda, Ooita, JP;
Shizuo Sawada, Kanagawa, JP;
Assignee:
Kabushiki Kaisha Toshiba, Kanagawa, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437195 ; 437978 ; 437240 ; 437228 ; 437982 ; 148D / ;
Abstract
A Phospho Silicate Glass layer is used for an insulation layer between a lower wiring layer including a refractory metal silicide and an upper wiring layer in a semiconductor device of a multilevel interconnection structure. A reflow treatment is performed on the Phospho Silicate Glass layer using steam. A part of the lower wiring layer is oxidized during the reflow treatment, and the resistivity of the lower wiring layer is simultaneously lowered during the reflow treatment.
Maeda, Satoshi. (1991). Method for manufacturing a semiconductor device having a phospho (U.S. Patent No. 5004704). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5004704
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile