The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 1991
Filed:
Jun. 27, 1988
Douglas R Chisholm, Delray Beach, FL (US);
Robert G Iseminger, Binghamton, NY (US);
Richard A Kelley, Coral Springs, FL (US);
Wan L Leung, Coral Springs, FL (US);
James T Moyer, Endwell, NY (US);
Mark C Snedaker, Vestal, NY (US);
International Business Machines Corp., Armonk, NY (US);
Abstract
In a computer system, a plurality of input/output processors (IOP's) are connected via an asynchronous input/output bus, called an 'SPD' bus, to one side of an input/output interface controller (IOIC). The other side of the IOIC is connected to a storage controller (SC) via a synchronous bus called an 'adapter' bus. The SC is connected to a common system memory and possibly also to an instruction processing unit. The IOIC comprises at least one shared DMA facility for executing DMA read/write storage operations requested by the IOP's via the SPD bus. Each shared DMA facility includes a buffer for holding control information and data to be transmitted between the SC and one of the IOP's. This enables the SPD bus to be released for utilization by otehr IOP's connected thereto during periods of 'storage latency' that occur after a DMA storage operation has been initiated by one IOP.