The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 19, 1991
Filed:
Oct. 02, 1989
Applicant:
Inventors:
William D Atwell, Jr, Austin, US;
Richard B Reis, Austin, TX (US);
Assignee:
Motorola, Inc., Schaumburg, IL (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
375107 ; 371-1 ; 307480 ;
Abstract
A method and apparatus in an integrated circuit having a plurality of distinct circuit modules which eliminates undesired effects of clock skewing when a common system clock is used. The same phase of the same system clock is used by both a transmitting circuit module and a receiving circuit module when data is communicated between two circuit modules. The receiving circuit module has an input portion having a first transistor clocked by the same phase of the same system clock, a latch and a second transistor. The latch and second transistor are clocked by a complement of the same phase of the system clock.