The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 1991

Filed:

Feb. 22, 1989
Applicant:
Inventors:

Masaaki Kawai, Kawasaki, US;

Hisako Watanabe, Machida, US;

Tomoyuki Ohtsuka, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L / ;
U.S. Cl.
CPC ...
375 76 ; 307358 ;
Abstract

A circuit for generating a discrimination voltage level V.sub.ref which is used as a reference voltage to discriminate between two adjacent logic levels or an input signal which can have a plurality of different voltage levels generally corresponding to a plurality of respective, different logic levels. The frequency at which the levels of the input signals lie in the upper half of the vicinity (i.e., the voltage range from the level V.sub.ref -.DELTA.V to the level V.sub.ref +.DELTA.V) of the discrimination voltage level (i.e., the 'upper half' thereof being the voltage range from V.sub.ref to V.sub.ref +.DELTA.V, '.DELTA.V' being a predetermined off-set value) and the frequency at which the levels of the input signals lie in the lower half of the vicinity (i.e., as above defined) of the discrimination level (i.e., the 'low half' thereof being the voltage range from V.sub.ref -.DELTA.V to V.sub.ref) are compared, and the discrimination level is controlled so that the above two frequencies are the same.


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