The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 12, 1991
Filed:
May. 07, 1990
Helmut Brazdrum, Munchen, DE;
Rudolf Koch, Unterhaching, DE;
Siemens Aktiengesellschaft, Munich, DE;
Abstract
A switched-capacitor sigma-delta modulator includes at least one memory element, at least one comparator, and at least one integrator. The at least one integrator has an input stage including a series circuit of a first switch, a first capacitor and a second switch, a third switch for connecting one of the two terminals of the first capacitor to ground potential, and a fourth switch for connecting the other of the two terminals of the first capacitor to ground potential. A nodal point is connected between the second and fourth switches and the other of the two terminals of the first capacitor. A negative feedback stage includes second and third capacitors each having one terminal connected to the nodal point. A fifth switch connects the other terminal of the second capacitor to a first potential. A sixth switch connects the other terminal of the third capacitor to a second potential. Seventh and eighth series-connected switches connect the other terminal of the second capacitor to the second potential. Ninth and tenth series-connected switches connect the other terminal of the third capacitor to the first potential. The eighth and tenth switches may be omitted. Eleventh and twelfth switches or thirteenth and fourteenth switches may respectively connect the second and third capacitors to one nodal point or to a nodal point symmetrical thereto or visa versa, as a function of the output signal of the memory element.