The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 1991
Filed:
Sep. 08, 1988
F David Kohlmeier, Redmond, WA (US);
Kellee Crisafulli, Redmond, WA (US);
Stephen A Kaufer, Seattle, WA (US);
John P Rostykus, Redmond, WA (US);
Douglas K Yip, Bellevue, WA (US);
Data I/O Corporation, Redmond, WA (US);
Abstract
A method and apparatus for observing an internal state of an electronic component in an electronic system comprising one or more electronic components. The apparatus consists of an electronic switch, a second electronic component, and a control circuit. The electronic switch can be operated in a first mode or a second mode. A first set of terminals on the electronic switch is connectable, in the first mode, to the first component to intercept both the signals being transmitted to the first component by the electronic system and the signals being transmitted by the first component to the electronic system. The electronic switch produces output signals in response to the intercepted signals and transmits them to the second electronic component. The control circuit causes the electronic switch to switch from the first mode to the second mode. In the second mode, the electronic switch can transmit test signals from the control circuit to the second component. The electronic switch can also transmit signals representative of the response of the second component to a third set of switchable terminals. If desired, the representative signals can be stored in a digital memory that is connected to the third set of switchable terminals.