The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 26, 1991
Filed:
Sep. 01, 1989
Yoshichika Hirao, Osaka, JP;
Nobukazu Hosoya, Nara, JP;
Sanyo Electric Co., Ltd., Moriguchi, JP;
Abstract
A circuit for providing a signal phase locked to a horizontal synchronization signal included in a received video signal includes a first PLL loop (16, 44, 46; 16, 46', 204) and a second PLL or AFC loop (26, 44, 46; 26, 44, 46', 204). The first PPL loop has a plurality of lock ranges. The second PLL or AFC loop, which has an output characteristic with a single S curve, has one lock range large in width. The second PLL or AFC loop is supplied with a horizontal synchronization signal separated in a synchronization separating circuit via a bandpass filter. The first PLL loop is directly supplied with a horizontal synchronization signal extracted in the synchronization separating circuit. The first PLL loop shares a voltage controlled oscillator (46; 46') and a frequency divider (46; 204) with the second PLL loop or AFC loop. This phase synchronizing circuit further includes a circuit (48) for detecting synchronization/non-synchronization of an output of the frequency divider circuit with the horizontal synchronization signal separated/extracted in the synchronization separating circuit, and a switching circuit (42) for activating one of the first PLL loop and the second PLL or AFC loop in response to an output of this synchronization detector circuit.