The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 19, 1991
Filed:
Jul. 05, 1989
Toshio Matsuzaki, Yokohama, JP;
Hiroaki Toshima, Tokyo, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A hybrid integrated circuit including: a circuit substrate on which at least one of an active and passive semiconductor element is formed; a lead frame having a plurality of leads and a support plate with an opening formed therein, and supporting the circuit substrate thereon; and a mold of resin for packaging the circuit substrate, support plate and part of the leads of the lead frame, wherein a bottom surface of the circuit substrate is exposed and made to contact the mold resin through the opening. The circuit has a ratio of the exposed bottom surface to the entire bottom surface greater than 50%, and a ratio of surface area of the circuit substrate to a principal surface area of the mold of greater than 60%. There are a plurality of support plate configurations. The circuit relieves the mechanical stress caused in the mold package and eliminates cracking of the mold. Further, a package structure can be made resistant to deformation by appropriately selecting mold thicknesses above and below the circuit substrate.