The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 19, 1991
Filed:
Mar. 26, 1990
Wayne P Shepherd, Sunrise, FL (US);
Darrell E Davis, Sunrise, FL (US);
Frederick L Martin, Gainesville, FL (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A frequency synthesizer (10) for providing a modulated output signal (fo) includes a reference frequency signal (fr) and a voltage controlled oscillator (14). For dividing the frequency of the output signal from the voltage controlled oscillator (14) by a divisor, a programmable divider (16) is coupled to the output of the voltage controlled oscillator (14). To produce a phase-locked loop in which the frequency of the output signal from the voltage controlled oscillator (14) is equal to the frequency of the reference frequency (fr) signal multiplied by the divisor, a phase detector (12 ) having a first input coupled to the reference frequency signal (fr), a second input coupled to the output of the programmable divider (16), and an output coupled to the input of the voltage controlled oscillator (14) is also provided. A first integrator (24) for integrating a modulating signal provides an integrated signal and a first control signal. Similarly, a second integrator (25) coupled to the first integrator (24) for integrating the integrated signal provides a second control signal. A differentiator ( 36, 42 and 48) coupled to the second integrator (25) differentiates the second control signal to provide a third control signal. Finally, a processor (41 and 43) coupled to the first integrator (24), the second integrator (25) and the differentiator (36, 42 and 48) processes the first, second, and third control signals and a divider modulus code (M). The processor (41 and 43) coupled to the programmable divider modifies the divider modulus code (M) in response to the modulating signal (9) to provide the divisor, whereby the frequency of the output signal from the voltage controlled oscillator (14) is modulated by the modulating signal (9).