Method for manufacturing a trench capacitor using a photoresist etch

Abstract

A method for manufacturing a trench capacitor in a silicon wafer using a photoresist etch back process comprising sequentially depositing an oxide layer, a nitride layer and an oxide layer as a mask layer on the Si wafer and coating the mask layer with a photoresist layer is disclosed. A first pattern is formed by removing a portion of the photoresist layer and a second a mask pattern is formed by removing the exposed mask layer along the photoresist pattern, and then completely removing the photoresist. A trench is formed in the Si wafer along the second mask pattern. A thin doped oxide layer having a constant thickness is deposited outside and inside the trench. The doped oxide layer is entirely coated with a photoresist, thereby filling the trench with photoresist. The top surface of the photoresist is then planarized. The resulting photoresist coated Si wafer is baked and the photoresist deposited outside and inside the trench is selectively etched back. The doped oxide layer is selectively etched to the photoresist remaining in the trench, together with the oxide layer. The photoresist remaining inside the trench is completely removed. The doped oxide remaining inside the trench is thermally processed, thereby forming a selective doping region along the wall of the trench in the Si wafer.