The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 12, 1991
Filed:
May. 01, 1989
Gianfranco Gerosa, Austin, TX (US);
Rene M Delgado, Austin, TX (US);
Carl L Shurboff, Chandler, AZ (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
An output buffer integrated circuit, including an output signal, is provided having an improved Vdd and Vss noise characteristics. The output buffer comprise a plurality of pull-up stages and pull-down stages functioning as complementary pairs. The pull-up stage pulls the output signal to the Vdd potential, and the pull-down stages pulls the output to the Vss potential. Each stage provides a pulling signal to turn on a pulling transistor in response to the pulling signal of the previous stage. The first pulling stage provides the pulling signal in response to the input signal. Each stage sequentially pulls the output signal within a substantially constant time. The constant time delay within each stage is provided by sizing the width of the active elements on the integrated circuit. The pulling stages turn off the pulling transistors instantaneously in response to the invert of the input signal.