The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 1991

Filed:

Jan. 03, 1990
Applicant:
Inventors:

David Hatten, Belvidere, IL (US);

Joe Foster, Rockford, IL (US);

Walter Fry, Rockford, IL (US);

Barry Drager, Rockford, IL (US);

Abdul Rashid, Rockford, IL (US);

Assignee:

Sundstrand Corporation, Rockford, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
377 29 ; 365201 ; 371 24 ;
Abstract

This invention relates to a method of testing an n-bit programmable counter. It is desired to test the n-bit programmable counter in fewer than 2.sup.n cycles. Accordingly, a counter value output on the counter is coupled to a variable increment rate input on the counter. Each bit of the counter is reset to a binary 0 initial state. A binary 1 state is loaded into a carry-in bit of the counter and the counter is iteratively doubled, by means of the coupling between the counter value output and the variable increment rate input, until a carry-out bit of the counter assumes the binary 1 state to thereby allow the counter to be fully tested in n+1 iterations. The counter value output and the variable increment rate input are decoupled from the counter when the counter is not being tested. The counter is provided with a parallel load input to allow simultaneous resetting of each bit. Intermediate counter values may be checked to provide a means for localizing errors within the counter.


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