The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 1991

Filed:

Feb. 20, 1990
Applicant:
Inventors:

David M Susak, Chandler, AZ (US);

Byron G Bynum, Gilbert, AZ (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F / ;
U.S. Cl.
CPC ...
330265 ; 330267 ;
Abstract

An amplifier output stage with minimum circuitry and optimum performance for providing a SAT-to-SAT output voltage signal at an output terminal. The amplifier output stage includes a first transistor having a collector coupled to the output terminal for sourcing current thereto, a base coupled to a first supply voltage terminal, and an emitter coupled to the first supply voltage terminal. A second transistor having a collector coupled to the output terminal for sinking current thereat, a base, and an emitter coupled to a second supply voltage terminal. A third transistor having a collector, a base coupled to the base of the second transistor, and an emitter coupled to the second supply voltage terminal by a first resistor. A fourth transistor having a collector coupled to the first supply voltage terminal, a base coupled to an input terminal, and an emitter coupled to the base of the third transistor. A fifth transistor having a collector coupled to the base of the first transistor, a base coupled to the collector of the third transistor, and an emitter coupled to the second supply voltage terminal and a sixth transistor having a collector coupled to the first supply voltage terminal, a base coupled to the first supply voltage terminal and to the second supply voltage terminal, and an emitter coupled to the base of the fifth transistor.


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