The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 1991
Filed:
Sep. 12, 1988
Yoshihiro Wakiyama, Kyoto, JP;
Yoshiro Ohnishi, Kyoto, JP;
Horiba, Ltd., Kyoto, JP;
Abstract
An analog/digital converter includes a peak holding circuit for holding a peak voltage of input analog data and a peak time detecting circuit for detecting a point of time when the input analog data reaches a peak voltage. Also included is a constant current discharging circuit for discharging the peak voltage held in the peak holding circuit at a constant current from the peak point of time detected by the peak time detecting circuit. The converter also includes a zero time detecting circuit for detecting a zero point of time when a voltage held in the peak holding circuit is reduced to zero and a time to digital converting circuit for counting a number of pulses in a pulse line obtained by gating clock pulses during a period of time from the peak time detected by the peak detecting circuit to the zero time detected by the zero time detecting circuit, the time to digital converting including a counter to output digital data corresponding to the input analog data. A positive offset analog voltage is added to the input analog data and a digital compensator compensates the digital data obtained by the time to digital converting circuit by providing a negative offset digital value approximately corresponding to the positive offset analog voltage, more correctly, equal to a number of pulses in a pulse line passing through a clock gate of the time-to-digital converting circuit for a period of time during which the input analog data has a value equal to zero.