The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 22, 1991

Filed:

Sep. 06, 1989
Applicant:
Inventor:

Keiichi Kawana, Chiba, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307465 ; 307243 ; 307468 ; 307473 ;
Abstract

In a programmable input/output circuit which is used in a programmable integrated circuit, for interfacing between an external circuit and an internal logic circuit, both disposed exteriorly and interiorly of said integrated circuit, an input/output terminal connected to a bus of the internal logic circuit and a tri-state input buffer are provided, and hereby assured that an external input signal is transmitted to either of the input/output terminal and an ordinary input terminal by switching the status of the tri-state input buffer. In a programmable logic device, which incorporates said input/output circuit, a tri-state buffer is provided between an input/output circuit block and a wiring element, and hereby a driving capability of the wiring element used as a bus line is increased.


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