The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 15, 1991

Filed:

Feb. 21, 1989
Applicant:
Inventors:

Sheldon Aronowitz, San Jose, CA (US);

Donald D Forsythe, Palo Alto, CA (US);

George P Walker, Capitola, CA (US);

Bhaskar V Gadepally, San Jose, CA (US);

Assignee:

National Semiconductor, San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
357 235 ; 357 54 ; 357 90 ; 357 91 ; 357 233 ;
Abstract

A semiconductor memory device having a CMOS memory cell with a floating gate and increasing concentration of dopant in the source, drain and channel regions. Typically the concentration profile is generally exponential across the channel width. The device has relatively high diffusion current densities accelerated toward the surface and directed toward the channel/drain interface. Gate oxidation thickness is reduced over the channel near the drain to create a tunnel 'window' in the area of greatest electric field magnitude. The device provides for significantly reduced write times as compared to conventional devices.


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