The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 1990

Filed:

Oct. 14, 1988
Applicant:
Inventors:

Miles E Goff, Carlisle, MA (US);

David E Meharry, Lexington, MA (US);

Assignee:

Sanders Associates, Inc., Nashua, NH (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06G / ; G06G / ;
U.S. Cl.
CPC ...
307492 ; 307494 ; 307497 ; 328145 ;
Abstract

A successive detection logarithmic amplifier consists of multiple stages, with each stage containing a field-effect transistor (FET) which functions as both an amplifier and a detector. The FET, having an external gate biasing terminal, is biased to operate in its linear region as an amplifier. The gate-source junction of the FET, which is a diode, functions as the detector. When a signal exceeding a predetermined threshold is applied to the FET, the gate-source junction conducts current in the forward direction during the positive half-cycles of the input signal. During the negative half-cycles of the input signal, very little current flows through the gate-source diode junction. The time average of the forward current peaks produces a voltage across a resistor connected between the external gate bias terminal and ground. The voltages at the external gate bias terminals of each of the stages are summed to form a video output signal, a piece-wise linear voltage which is a logarithmically proportional to the input signal at the initial stage.


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