The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 11, 1990
Filed:
Apr. 30, 1990
Hideya Ohtani, Aichi, JP;
Toshimitsu Momoi, Higashimurayama, JP;
Eiji Ooi, Kawagoe, JP;
Shuhei Sakuraba, Kodaira, JP;
Masayuki Morita, Nishitama, JP;
Yoshiaki Wakashima, Kawasaki, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
According to the present invention, a tape carrier is prepared which comprises a power trunk line including an electric connection as a branch of a power lead for each tape carrier unit and a ground trunk line having an electric connection as a branch of a ground lead for each tape carrier unit, the power and trunk lines being continuously formed along the longitudinal direction of the tape carrier, and a lead for a control signal for establishing an electric conduction along the longitudinal direction of the tape carrier via an aging wiring for semiconductor pellets to conduct a simultaneous multipoint (gang) bonding on the tape carrier, the control signal lead being formed on the tape carrier. By mounting the semiconductor pellets having the aging wiring on the tape carrier, it is enabled to apply the power voltage and to supply the control signal to each of the plurality of the semiconductor pellets, and hence the operation test can be simultaneously conducted for the semiconductor pellets mounted on the tape carrier having an arbitrary length. This provision enables a plurality of semiconductor devices mounted on the tape carrier to be subjected to an aging, namely, a reliability test under a thermal environment and in the operating state, and hence an efficient reliability test can be achieved with an effect of the mass production. Consequently, a highly reliable semiconductor device can be provided.