The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 04, 1990

Filed:

Apr. 21, 1989
Applicant:
Inventors:

Shigeki Tanaka, Nara, JP;

Koji Imura, Kitakatsuragi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
3241 / ; 324 731 ; 371 225 ; 371 251 ;
Abstract

An integrated circuit which can be operated in a test mode includes a test input terminal for instructing the switching between an actual use mode and a test mode, a plurality of input terminals, an AND gate for performing logic operations on the input signals from the input terminals, a plurality of flip-flops for storing each of the input signals from the remaining plurality of input terminals by using the outpout of the AND gate as a timing signal, a decoder for producing a test mode designating signal to select one test mode from a plurality of test modes in response to each of the outputs of the flip-flops, and a control circuit for operating a processing circuit in the test mode designated by the test mode designating signal in response to the test mode setting signal from the test input and the test mode designating signal from the decoder. The configuration of this circuit permits the testing of the signals from the output terminals of the integrated circuit without excessively increasing the number of input terminals necessary for the test mode.


Find Patent Forward Citations

Loading…