The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 1990
Filed:
Jul. 25, 1989
Applicant:
Inventor:
Hiroyuki Matsuo, Tokyo, JP;
Assignee:
NEC Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307480 ; 3072721 ; 307465 ; 307269 ;
Abstract
A logic integrated circuit comprises a logic circuit, an input-stage flip-flop connected to the input of the logic circuit and an output-stage flip-flop connected to the output of the logic circuit. Each of the input- and output-stage flip-flops is responsive to a clock pulse to change their output logic states depending on their input logic states, so that an output pulse generated by each of the flip-flops has a duration which is determined exclusively by the interval between successive clock pulses.