The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 1990
Filed:
Dec. 12, 1988
Tatsuo Satoh, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A circuit arrangement for checking excessive time delay in the propagation of signals between two circuit blocks is provided in which two successive square wave clock signals are generated, each having a cycle period equal to the maximum permissible time delay, and a test signal is propagated between the circuit blocks initiated together with the first clock signal. The times of receipt by the second circuit block of the test signal and each clock signal are stored, and means are provided for producing a disparity signal whenever there is a disparity between the two stored signals. A third clock signal is generated which lags the second clock signal and this is compared with the disparity signal to produce an excess delay indicating signal whenever they simultaneously occur.