The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 1990

Filed:

May. 12, 1989
Applicant:
Inventors:

Hiroaki Tanaka, Yokohama, JP;

Naokazu Miyawaki, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365233 ; 36523006 ; 36523008 ;
Abstract

A first chip enable signal for determining the operation timing of a memory chip is supplied to a first chip enable input circuit. A second chip enable signal for selectively specifying the stand-by mode/operative mode of the memory chip and an output signal of the first chip enable input circuit are supplied to a second chip enable input circuit. The second chip enable signal is received and latched by means of the second chip enable input circuit when the first chip enable signal is set active. An internal chip enable signal is output from the second chip enable input circuit based on the latched output to set the internal circuit of the memory chip into the stand-by mode.


Find Patent Forward Citations

Tanaka, Hiroaki. (1990). Chip enable input circuit in semiconductor memory device (U.S. Patent No. 4970694). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4970694

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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