The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 1990

Filed:

Apr. 14, 1988
Applicant:
Inventors:

Bruce E Roberts, Palm Bay, FL (US);

Jimmy C Black, Palm Bay, FL (US);

George E Mraz, Fellsmere, FL (US);

Assignee:

Harris Corporation, Melbourne, FL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01L / ; G01L / ;
U.S. Cl.
CPC ...
357 71 ; 357 54 ;
Abstract

Formation of an interconnect structure having a self-planarized dielectric layer between successive layers of metallization is accomplished by conformally depositing a dielectric layer over the entire structure (including underlying regions and contact base metallization) to which the interconnect pattern is to be plated. Atop the dielectric layer a sacrificial layer is conformally deposited. Thereafter apertures are etched through both the sacrificial and dielectric layers in accordance with a prescribed interconnect plating pattern that has been photolithographically mapped onto the laminate structure. The aspect ratios of the apertures through the laminate are such that metal to be subsequently deposited therethrough is confined to the exposed surface area of the underlying topography but not on the sidewalls of the apertures through the dielectric layer. The sacrificial layers (and overlying metal plate) are then removed leaving only the patterned conformed dielectric layer and the deposited metal. The main body portion of the interconnect structure is now plated onto the deposited metal pattern to a thickness in the apertures of the dielectric which is slightly below the top surface of the dielectric layer. Thereafter, a second, thin dielectric layer is non-selectively conformally deposited over the entire structure. Contact vias for a second layer of metal to be formed over the top surface of the second dielectric layer are selectively etched through this second dielectric layer to expose surface portions of the underlying plated metal.


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