The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 1990

Filed:

Jul. 02, 1984
Applicant:
Inventor:

Mark A Reed, Dallas, TX (US);

Assignee:

Texas Instruments Incorp., Dallas, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
357 12 ; 357-4 ; 357 16 ;
Abstract

A new kind of electronic logic circuit, wherein potential wells (e.g. islands of GaAs in an AlGaAs lattice) are made small enough that the energy levels of carriers within the wells are discretely quantized. This means that, when the bias between the wells is adjusted to align energy levels of the two wells, tunneling will occur very rapidly, whereas when the energy levels are not aligned, tunneling will be greatly reduced. In particular, the wells are optimized to have sharp enough resonant tunneling peaks that the change in potential caused by the difference between the number of carriers stored between two adjacent tunnel wells is itself enough to permit or preclude resonant tunneling. Thus, a tremendous variety of logic functions, including all primitive Boolean functions can be embodied in this logic.


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