The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 1990

Filed:

Sep. 25, 1989
Applicant:
Inventors:

Giao N Pham, Vancouver, WA (US);

Kenneth C Schmitt, Colorado Springs, CO (US);

Assignee:

NCR Corporation, Dayton, OH (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307480 ; 307443 ; 307261 ; 307262 ; 307269 ; 307510 ; 307518 ; 307527 ; 307529 ; 328110 ; 328133 ; 377 55 ; 377111 ;
Abstract

A circuit for generating clock and control signals from first and second asynchronous binary signals. The circuit generates first and second pulse signals responsive to the first and second asynchronous binary signals, a clock pulse signal responsive to the first or second pulse signal, and an identification control signal to indicate which of the two binary signals is responsible for the clock signal. The circuit is also responsive to the first and second pulse signals for generating an overlap control signal to indicate overlap in the first and second pulse signals.


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Pham, Giao. (1990). Clock generating circuit for asynchronous pulses (U.S. Patent No. 4968906). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4968906

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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