The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 30, 1990

Filed:

Apr. 08, 1988
Applicant:
Inventors:

Hiroaki Fukumaru, Hitachi, JP;

Soichi Takaya, Hitachi, JP;

Takayuki Morioka, Hitachi, JP;

Tadaaki Bandoh, Ibaraki, JP;

Shinichiro Yamaguchi, Hitachi, JP;

Kenji Hirose, Hitachi, JP;

Assignees:

Hitachi, Ltd., Tokyo, JP;

Hitachi Engineering, Ltd., Hitachi, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ; G06F / ; G06F / ;
U.S. Cl.
CPC ...
364200 ; 364900 ; 364258 ; 364263 ; 3642318 ; 3649371 ; 3649235 ; 36494834 ; 3649462 ;
Abstract

A processor performs a pipelined parallel processing by an operand effective address calculation unit for calculating an operand effective address necessary to execute an instruction and an instruction execution unit for executing the instruction. A 64 bit width data operation is performed in such a way that a high order 32 bit operation is performed in an arithmetic device in the operand effective address unit and a low order 32 bit operation is performed in another arithmetic device in the instruction execution unit. A carry is transferred from the low order 32 bit arithmetic device to the high order 32 bit arithmetic device. The arithmetic devices thus joined can perform the 64 bit with data operation as an arithmetic device.


Find Patent Forward Citations

Loading…