The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 1990
Filed:
Feb. 28, 1990
Kanji Otsuka, Higashiyamato, JP;
Shigeo Kuroda, Ohme, JP;
Katsuyuki Sato, Kodaira, JP;
Hisashi Nakamura, Ohme, JP;
Shinichi Shouji, Akishima, JP;
Hitachi, Ltd., Tokyo, JP;
Hitachi VLSI Engineering Corp., Tokyo, JP;
Abstract
The present invention discloses a suitable mounting of a wafer scale LSI (wafer scale integration) (WSI) in which a slit formed in a wafer is fit to a connector, a U-shaped reinforcing rubber member is disposed at the circumferential edge of the wafer, or a flexible adhesive is used for bonding a substrate formed with through-holes and a wafer, to provide a WSI mounting structure of high integration degree and high reliability. Furthermore, a method of efficient mounting by conducting the wiring of the wafer and the connection with the external terminal of the chip in one identical production step is disclosed.