The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 1990
Filed:
Aug. 07, 1989
Akira Denda, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A monostable multivibrator comprising an input terminal receiving a trigger signal, a time constant circuit having at least a capacitor, a first pulse generator connected to the input terminal for generating a first pulse in synchronism with a leading edge of the trigger pulse, a first set-reset flipflop having a reset input connected to the first pulse generator and a Q output connected through a discharge circuit to one end of the capacitor, a first Schmitt circuit having an input connected to the one end of the capacitor and an output connected to a set input of the first flipflop, the first Schmitt circuit having a first threshold corresponding to a potential slightly higher than a potential of a logical low level so that the Schmitt circuit can detect a substantial discharge of the capacitor, a second Schmitt circuit having an input connected to the one end of the capacitor and having a second threshold corresponding to a potential slightly lower than a potential of a logical high level so that the Schmitt circuit can detect a substantial charge of the capacitor, a second pulse generator having an input connected to an output of the second Schmitt circuit for generating a second pulse in synchronism with a leading edge of the output of the second Schmitt, a second set-reset flipflop having a reset input connected to receive the second pulse from the second pulse generator and a Q output connected to an output terminal, and a logic gate having a first input connected to the output of the first pulse generator, a second input connected to the Q output of the second flipflop and an output connected to a set input of the second flipflop.