The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 1990
Filed:
Feb. 23, 1989
Hiromu Kitaura, Osakasayama, JP;
Mitsuo Isobe, Osaka, JP;
Yuichi Ninomiya, Kawasaki, JP;
Yoshimichi Ohtsuka, Kawasaki, JP;
Yoshinori Izumi, Tokyo, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Nippon Hoso Kyokai, Tokyo, JP;
Abstract
Disclosed is an automatic gain control device which comprises: a first amplitude detection circuit for detecting an average amplitude value of a television video signal, a peak amplitude value of the same television video signal, or a value obtained by mixing the average amplitude value and the peak amplitude value with a predetermined mixing ratio; a second amplitude detection circuit for detecting an amplitude value of a vertical or horizontal synchronizing signal in the television video signal; an amplitude control circuit for controlling an amplitude of an input television video signal; a synchronization circuit for detecting a vertical synchronizing signal and a horizontal synchronizing signal in the television video signal so as to generate various pulses including a clock pulse synchronized with the input television video signal by controlling an oscillation frequency of an oscillation circuit; and a synchronization phase lock detection circuit for detecting whether the synchronization circuit has been pulled into synchronism with the input television video signal, so that the amplitude control circuit is controlled by an output of the second amplitude detection circuit when synchronization phase-lock is established while controlled by an output of the first amplitude detection circuit when the synchronization phase-lock comes out.