The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 09, 1990

Filed:

Aug. 09, 1988
Applicant:
Inventors:

Seiichi Yamazaki, Tokyo, JP;

Hiroaki Inoue, Tokyo, JP;

Sumihiro Takashima, Tokyo, JP;

Hiroshisa Shishikura, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
357 42 ; 357 41 ; 357 239 ; 357 45 ; 350333 ; 350332 ; 350334 ; 350335 ; 350336 ;
Abstract

An analog switch includes n-channel and p-channel MOSFETs formed in a surface of a semiconductor substrate. Each of the n-channel and p-channel MOSFETs has first, second and third diffused regions which are formed in the semiconductor surface with the width thereof substantially equal to each other. The first and third diffused regions are spaced from the second diffused region to form first and second channel regions, respectively. Each of the n-channel and p-channel MOSFETs has first and second gate electrodes which are interconnected in common to each other and placed on respective gate insulating layers overlaying the first and second channel regions, respectively. The first gate electrode has an end portion extending over part of the second diffused region by a predetermined length, while the second gate electrode has an end portion extending over another part, opposite to the earlier-mentioned part, of the second diffused region by a predetermined length. A sample and hold circuit including the analog switch is also provided.


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Quick Actions:

Yamazaki, Seiichi. (1990). Analog switch with minimized noise ascribable to gate capacitance (U.S. Patent No. 4962413). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4962413

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